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small, 3.75 kv rms quad digital isolators data sheet adum3480 / adum3481 / ADUM3482 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. speci fications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2012 analog devices, inc. all rights reserved. features up to 25 mbps data rate (nrz) low propagat ion delay: 25 ns typical low dynamic power consumption 1.8 v to 5 v level translation high temperature operation: 125 c high common - mode transient immunity: >25 kv/s output default select 20 - lead, rohs - c ompliant, ssop package safety and regulatory approvals (pending): ul recognition: 375 0 v rms for 1 minute per ul 1577 csa c omponent a cceptance n otice #5a vde certificate of conformity din v vde v 0884 - 1 0 (vde v 0884 - 10):2006 - 12 v iorm = 560 v peak applications general - purpose multichannel isolation spi interface/data converter isolation industrial field bus isolation general description the adum3480 / adum3481 / ADUM3482 1 are quad - channe l digital isolators based on the analog devices, inc., i coupler? technology. combining high speed cmos and monolithic air core transf ormer technology, these isolation components provide outstanding performance char acteristics superior to alternatives such as optocoupler devices and other integrated couplers. with typical propagation delay reduced to 2 5 ns, pulse width distortion is also halved. the four channels of the adum3480 / adum3481 / ADUM3482 are available in a variety of channel configuration s with two data rate grades up to 25 mbps (see the ordering guide section ). all models use separate core and i/o power supplies. the core operates between 3.0 v and 5.5 v , whereas the i/o supply can range from 1.8 v to 5.5 v. i f i/o operation is required within the range of the core supply, the two supplies can be tied together to allow single - supply operation. when the i/o must interface with logic levels that are different from the core supply voltage, the i/o supp ly oper ates independently of the core supply over its wider range. the minimum i/o supply voltage is 1.8 v , which allow s compatibility with low voltage logic. both core and i/o supplies are required for proper operation. functional block dia grams reg reg v ddl1 v ddl2 1 20 gnd 1 gnd 2 2 19 v ia v oa 3 18 encode decode v ib v ob 4 17 encode decode v ic v oc 5 16 encode decode v id v od 6 15 encode decode nc ctrl 2 7 14 v dd1 v dd2 8 13 v ddc1 v ddc2 9 12 gnd 1 gnd 2 10 11 adum3480 10459-001 figure 1 . adum 348 0 reg reg v ddl1 v ddl2 1 20 gnd 1 gnd 2 2 19 v ia v oa 3 18 encode decode v ib v ob 4 17 encode decode v ic v oc 5 16 encode decode v od v id 6 15 decode encode ctrl 1 ctrl 2 7 14 v dd1 v dd2 8 13 v ddc1 v ddc2 9 12 gnd 1 gnd 2 10 11 adum3481 10459-002 figure 2 . adum 348 1 reg reg v ddl1 v ddl2 1 20 gnd 1 gnd 2 2 19 v ia v oa 3 18 encode decode v ib v ob 4 17 encode decode v oc v ic 5 16 decode encode v od v id 6 15 decode encode ctrl 1 ctrl 2 7 14 v dd1 v dd2 8 13 v ddc1 v ddc2 9 12 gnd 1 gnd 2 10 11 ADUM3482 10459-003 figure 3 . adum 348 2 1 protected by u.s. patents 5,952,849 ; 6,873,065 ; 6,903,578 ; and 7,075,329 . o ther patents are pending.
adum3480/adum3481/ADUM3482 da ta sheet rev. 0 | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagrams ............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics 5 v operation ................................ 3 electrical characteristics 3 v operation ................................ 5 electrical characteristics 1.8 v operation ............................ 7 package characteristics ............................................................... 9 regulatory information ............................................................... 9 regulatory approvals ................................................................... 9 insulation and safety related specifications ............................ 9 din v vde v 0884 - 10 (vde v 0884- 10) insulation characteristics ............................................................................ 10 recommended operating conditions .................................... 10 absolute maximum ratings ......................................................... 11 esd caution ................................................................................ 11 pin configurations and function descriptions ......................... 12 typical performance chara cteristics ........................................... 15 applications information .............................................................. 17 supply voltages ........................................................................... 17 pri nted circuit board layout ................................................... 17 propagation delay related parameters ................................... 17 dc correctness and magnetic field immunity ..................... 17 power consumption .................................................................. 18 insulation lifetime ..................................................................... 19 outline dimensions ....................................................................... 20 ordering guide .......................................................................... 20 revision history 7 /12 revision 0: initial version
data sheet adum3480/adum3481/ADUM3482 rev. 0 | page 3 of 20 specifications electrical character istics 5 v operation all typical specifications are at t a = 25c , v ddl1 = v dd1 = v ddl2 = v dd2 = 5 v. minimum/maximum specifications apply over the entire recommended operati on range: 4.5 v v ddl1 , v dd1 5.5 v, 4.5 v v ddl2 , v dd2 5.5 v, ? 40c t a + 125c , unless otherwise noted. switching specifications are tested with c l = 15 pf, and cmos signal levels , unless otherwise noted. table 1. parameter symbol a grade b grade unit test conditions /comments min typ max min typ max switching specifications pulse width pw 1000 40 ns within pwd limit data rate 1 25 mbps within pwd limit propagation delay t phl , t plh 65 90 25 33 ns 50% inpu t to 50% output pulse width distortion pwd 6 3 ns |t plh ? t phl | change vs . temperature 7 3 ps/ c propagation delay skew t psk 50 17 ns between any two units channel matching codirectional t pskcd 19 5 ns opposing direction t pskod 25 7 ns jitter 2 2 ns table 2. parameter symbol 1 mbps a, b g rades 25 mbps b grade unit test conditions/comments min typ max min typ max supply current adum3480 i dd1 2.0 2.9 8.6 12 ma i ddl1 0.11 0.4 0.2 0.6 ma i dd2 5.1 6.9 6.0 7.5 ma i ddl 2 0.2 0.7 2.1 4.8 ma c l = 0 pf adum3481 i dd1 2.8 3.0 7.9 10 ma i ddl1 0.14 0.5 0.7 1.4 ma c l = 0 pf i dd2 4.3 5.7 6.7 7.8 ma i ddl2 0.18 0.6 1.6 3.2 ma c l = 0 pf ADUM3482 i dd1 3.5 4.1 7.3 8.8 ma i ddl1 0.16 0.5 1.2 2.4 ma c l = 0 pf i dd2 3.5 4.7 7.3 8.8 ma i ddl2 0.16 0.65 1.2 2.4 ma c l = 0 pf
adum3480/adum3481/ADUM3482 data sheet rev. 0 | page 4 of 20 table 3. parameter symbol min typ max unit test conditions/comments dc specifications input voltage thresh old logic high v ih 0.7 v ddl x v logic low v il 0.3 v ddl x v output voltages logic high v oh v ddl x ? 0.1 5.0 v i ox = ?20 a, v ix = v ixh v ddl x ? 0.4 4.8 v i ox = ?4 ma, v ix = v ixh logic low v ol 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.2 0.4 v i ox = 4 ma, v ix = v ixl input current per channel i i ? 1 0 +0.01 +1 0 a 0 v v i x v ddl x , 0 v v ctrlx v ddl x supply current per channel quiescent supply current regulator input side i ddi (q) 0.50 0.60 ma i/o input i ddil (q) 0.027 0.05 ma regulator output side i ddo (q) 1.26 1.7 ma i/o output i ddol (q) 0.031 0. 1 0 ma dynamic supply current regulator input side i ddi (d) 0.070 ma/mbps i/o input i ddil (d) 0.90 a/mbps regulator output side i ddo (d) 0.010 ma/mbps i/o output i ddol (d) 0.020 ma/mbps ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 1 |cm| 25 35 kv/s v ix = v ddl x , v cm = 1000 v, transient magnitude = 800 v refresh period t r 1.66 s 1 |cm| is the maximum common - mode voltage slew rate that can be sustained while mainta ining v o l < 0.8 v ddl x or v o h > 0. 7 v ddi x . the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges.
data sheet adum3480/adum3481/ADUM3482 rev. 0 | page 5 of 20 electrical character istics 3 v operation all typical specifications are at t a = 25 c, v ddl1 = v dd1 = v ddl2 = v dd2 = 3.0 v. minimum/maximum specifications apply over the entire recommended operation range: 3.0 v v ddl1 , v dd1 3.6 v, 3.0 v v ddl2 , v dd2 3.6 v, ? 40c t a + 125 c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels , unless otherwise noted . table 4. parameter symbol a grad e b grade unit test conditions/comments min typ max min typ max switching specifications pulse width pw 1000 40 ns within pwd limit data rate 1 25 mbps within pwd limit propagation delay t phl , t plh 71 99 28 38 ns 50% input to 50% output pulse width distortion pwd 2 12 3 5 ns |t plh ? t phl | change vs . temperature 7 3 ps/ c propagation delay skew t psk 58 20 ns between any two units channel matching codirectional t pskcd 20 6 ns opposing direction t pskod 26 9 ns jitter 4 3 ns table 5. parameter symbol 1 mbps a, b grades 25 mbps b grade unit test conditions/comments min typ max min typ max supply current adum3480 i dd1 1.4 2.9 8.1 11 ma i ddl1 0.08 0.4 0.13 0.5 ma i dd2 4.9 6.7 5.8 7.2 ma i ddl2 0.14 0.40 1.4 2.5 ma c l = 0 pf adum3481 i dd1 2.3 3.0 7.5 9.8 ma i ddl1 0.09 0.4 0.46 1.4 ma c l = 0 pf i dd2 4.0 5.7 6.4 7.5 ma i ddl2 0.12 0.5 1.1 2.7 ma c l = 0 pf ADUM3482 i dd1 3.2 4.2 7.0 8.8 ma i ddl1 0.11 0.5 0.78 1.7 ma c l = 0 pf i dd2 3.2 4.2 7.0 8.8 ma i ddl2 0.11 0. 5 0.78 1.7 ma c l = 0 pf
adum3480/adum3481/ADUM3482 data sh eet rev. 0 | page 6 of 20 table 6. parameter symbol min typ max unit test conditions/comments dc specifications inpu t voltage thre shold logic high v ih 0.7 v ddl x v logic low v il 0.3 v ddl x v output voltages logic high v oh v ddl x ? 0.1 3.0 v i ox = ?20 a, v ix = v ixh v ddl x ? 0.4 2.8 v i ox = ?4 ma, v ix = v ixh logic low v ol 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.2 0.4 v i ox = 4 ma, v ix = v ixl input current per channel i i ? 1 0 +0.01 +1 0 a 0 v v i x v ddl x , 0 v v ctrlx v ddl x supply current per channel quiescent supply current regulator input side i ddi (q) 0.36 0.5 ma i/o input i ddil (q) 0.019 0.050 ma regulator output side i ddo (q) 1.21 1.7 ma i/o output i ddol (q) 0.021 0.0 50 ma dynamic suppl y current regulator input side i ddi (d) 0.070 ma/mbps i/o input i ddil (d) 0.53 a/mbps regulator output side i ddo (d) 0.010 ma/mbps i/o output i ddol (d) 0.013 ma/mbps ac specifications output rise/fall time t r /t f 3 ns 10% to 90% common - mode transient immunity 1 |cm| 25 35 kv/s v ix = v ddl x , v cm = 1000 v, transient magnitude = 800 v refresh period t r 1.66 s 1 |cm| is the maximum common - mode voltage slew rate that can be sustained while maintaining v o l < 0.8 v ddl x or v o h > 0. 7 v ddi x . the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges.
data sheet adum3480/adum3481/ADUM3482 rev. 0 | page 7 of 20 electrical character istics 1.8 v operation all typical specifications are at t a = 25c, v ddl1 = 1.8 v, v dd1 = 3.0 v, v ddl2 = 1.8 v, v dd2 = 3.0 v. minimum/maximum specifications apply over the entire recommended operation range: v ddl1 = 1.8 v, 3.0 v v dd1 3.6 v, v ddl2 = 1.8 v, 3.0 v v dd2 3.6 v, ? 40c t a + 125c ; unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels , unless otherwise noted . table 7. parameter symbol a gra de b grade unit test conditions/comments min typ max min typ max switching specifications pulse width pw 1000 40 ns within pwd limit data rate 1 25 mbps within pwd limit propagation delay t phl , t plh 86 145 43 85 ns 50% input to 50% output pulse width distorti on pwd 6 32 6 30 ns |t plh ? t phl | change vs . temperature 7 3 ps/ c propagation delay skew t psk 93 60 ns between any two units channel matching codirectional t pskcd 40 34 ns opposing direction t pskod 55 37 ns jitter 4 3 ns table 8. parameter symbol 1 mbps a, b grades 25 mbps b grade unit test conditions/comments min typ max min typ max supply current adum3480 i dd1 1.4 1.9 8.1 11 ma i ddl1 0.04 0.3 0.07 0.4 ma i dd2 4.7 6.5 5.7 7.3 ma i ddl2 0.08 0.5 0.82 1.5 ma c l = 0 pf adum3481 i dd1 2.3 2.8 7.5 10 ma i ddl1 0.05 0.35 0.25 0.7 ma c l = 0 pf i dd2 3.9 5.7 6.3 8.0 ma i ddl2 0.07 0.4 0.63 1.3 ma c l = 0 pf ADUM3482 i dd1 3.1 3.8 6.9 8.7 ma i ddl1 0.06 0.4 0.44 1.1 ma c l = 0 pf i dd2 3.1 4.5 6.9 8.8 ma i ddl2 0.06 0.40 0.44 1.1 ma c l = 0 pf
adum3480/adum3481/ADUM3482 data sheet rev. 0 | page 8 of 20 table 9. parameter symbol min typ max unit test conditions/comments dc specifications i nput voltage thres hold logic high v ih 0.7 v ddl x v logic low v il 0.3 v ddl x v output voltages logic high v oh v ddl x ? 0.1 1.8 v i ox = ?20 a, v ix = v ixh v ddl x ? 0.4 1.6 v i ox = ?2 ma, v ix = v ixh logic low v ol 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.2 0.4 v i ox = 2 ma, v ix = v ixl input current per channel i i ? 1 0 +0.01 +1 0 a 0 v v i x v ddl x , 0 v v ctrlx v d dl x supply current per channel quiescent supply current regulator input side i ddi (q) 0.39 0.45 ma i/o input i ddil (q) 0.010 0.025 ma regulator output side i ddo (q) 1.17 1.5 ma i/o output i ddol (q) 0.012 0.0 38 ma dynamic supply current regulator input side i ddi (d) 0.071 ma/mbps i/o input i ddil (d) 0.25 a/mbps regulator output side i ddo (d) 0.010 ma/mbps i/o output i ddol (d) 0.0077 ma/mbps ac specifications output rise/fall time t r /t f 3 ns 10% t o 90% common - mode transient immunity 1 |cm| 25 35 kv/s v ix = v ddl x , v cm = 1000 v, transient magnitude = 800 v refresh period t r 1.66 s 1 |cm| is the maximum common - mode voltage slew rate that can be sustained while maintaining v o l < 0.8 v ddl x or v o h > 0. 7 v ddi x . the common - m ode voltage slew rates apply to both rising and falling common - mode voltage edges.
data sheet adum3480/adum3481/ADUM3482 r ev. 0 | page 9 of 20 package characterist ics table 10. parameter symbol min typ max unit test conditions/co mments resistance (input - to - output) 1 r i- o 10 12 ? capacitance (input -to - output) 1 c i- o 2.2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction - to - case thermal resistance jc 50.5 c/w thermocouple located at center of package underside, test conducted on 4 - la yer board with thin traces 1 the device is considered a 2 - terminal device: pin 1 to pin 10 are shorted together; pin 11 to pin 20 are shorted together. 2 input capacitance is from any input data pin t o ground. regulatory informati on the adum3480 / adum3481 / ADUM3482 are pending approv al by the o rga nizations listed in table 11. see table 16 and the insulation lifetime section for the recommended maximum working voltages for specific cross - isolation wavef orms and insulation levels. regulatory approvals table 11. u l (pending) csa (pending) vde (pending) recognized under the ul 1577 component recogn i tion program 1 approved under csa component acce p tance notice #5a certified accordi ng to din v vde v 0884 -10 (vde v 0884 - 10):2006-12 2 single protection, 3750 v rms isolation vol t age basic insulation per csa 60950 - 1 - 03 and iec 60950 - 1, 400 v rms (565 v peak) maximum working voltage reinforced insulation, 560 v peak file e214100 file 20 5078 file 2471900 -4880-0001 1 in accordance with ul 1577, each adum3480/adum3481/ADUM3482 is proof tested by applying an insulation test voltage of 4500 v rms for 1 second (current leakage detection limit = 10 a). 2 in accordance with din v vde v 0884 - 10 , each of the adum 348x is proof tested by applying an insulation test voltage of 1050 v peak for 1 second (partial discharge detection limit = 5 pc). the asterisk (*) marking branded on the component designates din v vde v 0884 - 10 approval. insulation and safet y related specifications table 12. parameter symbol value unit test conditions/comments rated dielectric insulation voltage 3750 v rms 1- minute duration minimum external air gap ( clearance) l(i01) >5.1 mm measured from input terminals to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) >5.1 mm measured from input terminals to output terminals, shortest distance path along body minimum in ternal gap (internal clearance) 0.017 min mm distance through insulation tracking resistance (comparative tracking index ) cti >400 v din iec 112/vde 0303 part 1 isolation group ii material group (din vde 0110, 1/89, table 1)
adum3480/adum3481/ADUM3482 data sheet rev. 0 | page 10 of 20 din v vde v 0884 - 10 (v de v 0884 -10) :2006- 12 insul ation characteristic s these isolators are suitable for reinforced electrical isolation only within the safety limit data. maintenance of the safety data is ensured by prote c tive circuits. the asterisk (* ) marking on packages denotes din v vde v 0884 - 10 approval. table 13. description test conditions/comments symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iii for rated mains voltage 400 v rms i to ii climatic classification 40/105/21 pollution degree per din vde 0110, table 1 2 maximum working insulation voltage v iorm 560 v peak input -to - output test voltage, method b 1 v iorm 1.875 = v pd(m) , 100% production test, t ini = t m = 1 sec, partial discharge < 5 pc v pd(m) 1050 v peak input -to - output test voltage, method a after environmental tests subgroup 1 v iorm 1.5 = v p d(m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc v pd(m) 840 v peak after input and/or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pd(m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc v pd(m) 672 v peak highest allowable overvoltage v iotm 5300 v peak withstand isolation voltage 1 minute withstand rating v iso 3750 v rms surge isolation voltage v peak = 10 kv, 1.2 s rise time, 50 s, 50% fall time v iosm 6000 v peak safety limiting values maximum value allowed in the event of a failur e (see figure 4) case temperature t s 150 c total p ower d issipation i s1 2.47 w insulation resistance at t s v io = 500 v r s >10 9 ? ambient temperature (c) safety-limiting power (w) 0 0 3.0 2.5 2.0 1.5 1.0 0.5 50 100 150 200 10459-004 figure 4 . thermal derating curve, dependence of safety limiting values with ambient temperature per din v vde v 0884 - 10 recommended operatin g conditions table 14. parameter symbol min max unit opera ting temperature t a ? 40 +125 c supply voltages 1 v ddl1 , v ddl2 1.8 5.5 v v dd1 , v dd2 3.0 5.5 v input signal rise and fall times 1.0 ms 1 see the dc correctness and mag netic field immunity section for information on immunity to external magnetic fields.
data sheet adum3480/adum3481/ADUM3482 r ev. 0 | page 11 of 20 absolute maximum r atings t a = 25c, unless otherwise noted. table 15. parameter rating supply voltages (v dd1 , v dd2 , v ddl1 , v ddl2 , v ddc1 , v ddc2 ) ? 0.5 v to +7.0 v input voltages (v ia , v ib , v ic , v id , v ctrl1 , v ctrl2 ) ? 0.5 v to v ddi + 0 .5 v output voltages (v oa , v ob , v oc , v od ) ? 0.5 v to v ddo + 0.5 v average output current per pin 1 ? 10 ma t o +10 ma common - mode transients 2 ? 100 kv/s to +100 kv/s storage temperature (t st ) range ? 65c to +150c ambient operating temperature (t a ) range ? 40c to +125c 1 see figure 4 for maximum rated current values for various temperatures. 2 refers to common - mode transients across the insulation barrier. common - mode transients exceeding the absolute maximum ratings may cause latch - up or permanent damage. stresses above those listed under absolute maximum ratings m ay cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum r ating conditions for extended periods may affect device reliability. table 16 . maximum continuous working volt age supporting 50 - year minimum lifetime 1 parameter max unit applicable certification ac voltage, bipolar waveform 565 v peak all certifications ac voltage, unipolar waveform 848 v peak dc voltage 848 v peak 1 refers to the continuous voltage magnitude imposed across the isolation barrier. see the insulation lifetime section for more informa tion. esd caution
adum3480/adum3481/ADUM3482 data sheet rev. 0 | page 12 of 20 pin configurations a nd function descript ions * pin 2 and pin 10 are internally connected. connecting both to pcb side 1 ground is recommended. pin 11 and pin 19 are internally connected. connecting both to pcb side 2 ground is recommended. notes 1. nc = no connection. this pin is not connected internally and can be left floating or connected to v dd1 or gnd 1 . 1 2 3 4 20 19 18 17 5 16 6 15 7 14 9 12 10 11 8 13 adum3480 top view (not to scale) v ddl1 gnd 1 * v ia v ib v ic v id nc v dd1 v ddc1 gnd 1 * v ddl2 gnd 2 * v oa v ob v oc v od ctrl 2 v dd2 v ddc2 gnd 2 * 10459-005 figure 5 . adum 348 0 pin configuration table 17. adum3480 pin f unction descriptions pin no. mnemonic description 1 v ddl1 1.8 v to 5.5 v supply voltage for isolator side 1 input/output c ircuits. bypass v ddl1 to gnd 1 with a 0.01 f to 0.1 f ceramic capacitor. for 3.0 v to 5.5 v i nput/ o utput operation, v ddl1 can be connected directly to v dd1 . 2 gnd 1 ground 1. ground reference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both to the pcb ground plane as close to the part as possible is recommended . 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v id logic input d. 7 nc no c onnection . this pin is not connected internally and can be left floating or connected to v dd1 or gnd 1 . 8 v dd1 3.0 v to 5.5 v supply voltage for isolator side 1. 9 v ddc1 o utput p in of an i nternal r egulator for s ide 1. bypass v ddc1 to gnd 1 with a 0.01 f to 0.1 f ceramic capacitor . do not use this pin to power external circuits. 10 gnd 1 ground 1. ground reference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both to the pcb ground plan e as close to the part as possible is recommended . 11 gnd 2 ground 2. ground reference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both to the pcb ground plane as close to the part as possible is recommended . 12 v ddc2 o utput p in of an i nternal r egulator for s ide 2. bypass v ddc2 to gnd 2 with a 0.01 f to 0.1 f ceramic capacitor . do not use this pin to power external circuits. 13 v dd2 3.0 v to 5.5 v supply voltage for isolator side 2. 14 ctr l 2 select s ide 2 o utput d e fau lt l evel. low = d efault output l ow. high = d efault o utput h igh. 15 v od logic output d. 16 v oc logic output c. 17 v ob logic output b. 18 v oa logic output a. 19 gnd 2 ground 2. ground reference for isolator side 2. pin 11 and pin 19 are internally co nnected, and connecting both to the pcb ground plane as close to the part as possible is recommended . 20 v ddl2 1.8 v to 5.5 v supply voltage for isolator side 2 input/output c ircuits. bypass v ddl2 to gnd 2 with a 0.01 f to 0.1 f ceramic capacitor . for 3 .0 v to 5.5 v i nput/ o utput operation, v ddl2 can be connected directly to v dd2 .
data sheet adum3480/adum3481/ADUM3482 r ev. 0 | page 13 of 20 * pin 2 and pin 10 are internally connected. connecting both to pcb side 1 ground is recommended. pin 11 and pin 19 are internally connected. connecting both to pcb side 2 ground is recommended. 1 2 3 4 20 19 18 17 5 16 6 15 7 14 9 12 10 11 8 13 adum3481 top view (not to scale) v ddl1 gnd 1 * v ia v ib v ic v od ctrl 1 v dd1 v ddc1 gnd 1 * v ddl2 gnd 2 * v oa v ob v oc v id ctrl 2 v dd2 v ddc2 gnd 2 * 10459-006 figure 6 . adum 348 1 pin configuration table 18. adum3481 pin function descr iptions pin no. mnemonic description 1 v ddl1 1.8 v to 5.5 v supply voltage for isolator side 1 input/output c ircuits. bypass v ddl1 to gnd 1 with a 0.01 f to 0.1 f ceramic capacitor . for 3.0 v to 5.5 v i nput/ o utput operation, v ddl1 can be connected dir ectly to v dd1 . 2 gnd 1 ground 1. ground reference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both to the pcb ground plane as close to the part as possible is recommended. 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v od logic output d. 7 ctrl 1 select s ide 1 o utput d efaul t level . low = d efault output l ow. high = d efault o utput h igh. 8 v dd1 3.0 v to 5.5 v supply voltage for isolator side 1. 9 v ddc1 o utput p in of an i nternal r egulator for si de 1. bypass v ddc1 to gnd 1 with a 0.01 f to 0.1 f ceramic capacitor . do not use this pin to power external circuits. 10 gnd 1 ground 1. ground reference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both to the pcb groun d plane as close to the part as possible is recommended. 11 gnd 2 ground 2. ground reference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both to the pcb ground plane as close to the part as possible is recommended. 12 v ddc2 o utput p in of an i nternal r egulator for s ide 2. bypass v ddc 2 to gnd 2 with a 0.01 f to 0.1 f ceramic capacitor . do not use this pin to power external circuits. 13 v dd2 3.0 v to 5.5 v supply voltage for isolator side 2. 14 ctr l 2 select s ide 2 o u tput d efault l evel. low = d efault output l ow. high = d efault o utput h igh. 15 v id logic input d. 16 v oc logic output c. 17 v ob logic output b. 18 v oa logic output a. 19 gnd 2 ground 2. ground reference for isolator side 2. pin 11 and pin 19 are inter nally connected, and connecting both to the pcb ground plane as close to the part as possible is recommended. 20 v ddl2 1.8 v to 5.5 v supply voltage for isolator side 2 input/output c ircuits. bypass v ddl 2 to gnd 2 with a 0.01 f to 0.1 f ceramic capacit or . for 3.0 v to 5.5 v i nput/ o utput operation, v ddl2 can be connected directly to v dd2 .
adum3480/adum3481/ADUM3482 data sheet rev. 0 | page 14 of 20 * pin 2 and pin 10 are internally connected. connecting both to pcb side 1 ground is recommended. pin 11 and pin 19 are internally connected. connecting both to pcb side 2 ground is recommended. 1 2 3 4 20 19 18 17 5 16 6 15 7 14 9 12 10 11 8 13 ADUM3482 top view (not to scale) v ddl1 gnd 1 * v ia v ib v oc v od ctrl 1 v dd1 v ddc1 gnd 1 * v ddl2 gnd 2 * v oa v ob v ic v id ctrl 2 v dd2 v ddc2 gnd 2 * 10459-007 figure 7 . adum 348 2 pin configuration table 19. ADUM3482 p in funct ion descriptions pin no. mnemonic description 1 v ddl1 1.8 v to 5.5 v supply voltage for isolator side 1 input/output c ircuits. bypass v ddl1 to gnd 1 with a 0.01 f to 0.1 f ceramic capacitor . for 3.0 v to 5.5 v i nput/ o utput operation, v ddl1 can be conn ected directly to v dd1 . 2 gnd 1 ground 1. ground reference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both to the pcb ground plane as close to the part as possible is recommended. 3 v ia logic input a. 4 v ib logic in put b. 5 v oc logic output c. 6 v od logic output d. 7 ctrl 1 select s ide 1 o utput d efault l evel. low = d efault output l ow. high = d efault o utput h igh. 8 v dd1 3.0 v to 5.5 v supply voltage for isolator side 1. 9 v ddc1 o utput p in of i nternal r egulator for s ide 1. bypass v ddc1 to gnd 1 with a 0.01 f to 0.1 f ceramic capacitor . do not use this pin to power external circuits. 10 gnd 1 ground 1. ground reference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both to the pcb ground plane as close to the part as possible is recommended. 11 gnd 2 ground 2. ground reference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both to the pcb ground plane as close to the part as possible is recommended. 12 v ddc2 o utput pin of i nternal r egulator for s ide 2. bypass v ddc 2 to gnd 2 with a 0.01 f to 0.1 f ceramic capacitor . do not use this pin to power external circuits. 13 v dd2 3.0 v to 5.5 v supply voltage for isolator side 2. 14 ctr l 2 select s ide 2 o utput d efault l evel. low = d efault output l ow. high = d efault o utput h igh. 15 v id logic input d. 16 v ic logic input c. 17 v ob logic output b. 18 v oa logic output a. 19 gnd 2 ground 2. ground reference for isolator side 2. pin 11 and pin 19 are internal ly connected, and connecting both to the pcb ground plane as close to the part as possible is recommended. 20 v ddl2 1.8 v to 5.5 v supply voltage for isolator side 2 input/output c ircuits. bypass v ddl 2 to gnd 2 with a 0.01 f to 0.1 f ceramic capacitor . for 3.0 v to 5.5 v i nput/ o utput operation, v ddl2 can be connected directly to v dd2 .
data sheet adum3480/adum3481/ADUM3482 r ev. 0 | page 15 of 20 typical performance characteristics data rate (mbps) i ddi current/channel (ma) 0 0 2.5 2.0 1.5 1.0 0.5 5 10 15 25 20 10459-008 v dd = 5v/v ddl = 5v v dd = 5v/v ddl = 1.8v figure 8 . typical v dd i = 5 v supply current per inpu t channel vs. data rate for 5 v and 1.8 v i/o operatio n data rate (mbps) i ddi current/channel (ma) 0 0 2.5 2.0 1.5 1.0 0.5 5 10 15 25 20 10459-009 v dd = 3.3v/v ddl = 3.3v v dd = 3.3v/v ddl = 1.8v figure 9 . typical v dd i = 3.3 v supply current per in pu t channel vs. data rate for 3 .3 v , and 1.8 v i/o operation data rate (mbps) i ddo current/channel (ma) 0 0 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 5 10 15 25 20 10459-010 v dd = 5v/v ddl = 1.8v v dd = 5v/v ddl = 5v figure 10 . typical v ddo = 5 v supply current per output channel vs. da ta rate for 5 v and 1.8 v i/o operation data rate (mbps) i ddo current/channel (ma) 0 0 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 5 10 15 25 20 10459-011 v dd = 3.3v/v ddl = 1.8v v dd = 3.3v/v ddl = 3.3v figure 11 . typical v ddo = 3.3 v supply current per output channel vs. da ta rate for 3.3 v and 1.8 v i/o operation data rate (mbps) v ddil current/channel (ma) 0 0 0.06 0.05 0.04 0.03 0.02 0.01 5 10 15 25 20 10459-012 v ddl = 5v v ddl = 3.3v v ddl = 1.8v figure 12 . t ypical v ddil input supply current vs. data ra te for 5 v, 3 .3 v , and 1.8 v operation data rate (mbps) i ddol current/channel (ma) 0 0 0.6 0.5 0.4 0.3 0.2 0.1 5 10 15 25 20 10459-013 v ddl = 5v v ddl = 1.8v v ddl = 3.3v figure 13 . t ypical v ddol output supply current vs. data rate for 5 v, 3 .3 v , and 1.8 v, c l = 0 pf operation
adum3480/adum3481/ADUM3482 data sheet rev. 0 | page 16 of 20 data rate (mbps) i ddol current/channel (ma) 0 0 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 5 10 15 25 20 10459-014 v ddl = 5v v ddl = 1.8v v ddl = 3.3v figure 14 . typical v ddol output supply current vs. data rate for 5 v, 3 .3 v , and 1.8 v, c l = 15 pf operation
data sheet adum3480/adum3481/ADUM3482 r ev. 0 | page 17 of 20 applications informa tion s upply v oltages the adum3480 / adum3481 / ADUM3482 device s are built around a fixed voltage internal data transfer core. the c ore voltage is 2.7 v , which is generated by regulating the v dd1 and v dd2 voltages with an internal ldo. to ensure proper headroom for the ldo , the v dd1 and v dd2 inputs must be in the 3.0 v to 5.5 v range. additional pins, v ddc1 and v ddc2 , are provided for direct bypass of the ldo output, ensurin g clean stable core operation. bypass capacitors to ground of between 0.01 f and 0.1 f are required for each of t hese supply or dedicated bypass pins. the adum3480 / adum3481 / ADUM3482 provide independent supplies for the i/o b uffers, v ddl1 and v ddl2 , w hich have wider operating range s than that required for the core. this allows the i/o supply voltage to range between 1.8 v and 5.5 v. the v ddlx supplies must also be bypassed with between 0.01 f and 0.1 f capacitors . having ind ependent power supplies for the i/o and core allows several power configurations depending on the i/o voltage required and the available power supply rails. if one power supply is available, t he v ddx and v ddlx pins can be connected together and operate bet ween 3.0 v and 5.5 v. if lower i/o supply voltage is required, to interface with low voltage logic, two supply rails are required. for example , if the i/o is 1.8 v logic, the v ddlx pin can be connected to a 1.8 v supply rail. the core supply voltage for v d dx require s an input of between 3.0 v and 5.5 v, so an available 3.3 v or 5 v supply rail c an be used. the i/o and core supply voltage on each side are independent and different configurations can be used on each side o f t he device. p rinted c ircuit board l ayout the adum3480 / adum3481 / ADUM3482 digital isolator requires no external interface circuitry for the logic int erfaces. power supply bypassing to the local ground is required at all four power suppl y pins , v dd1 , v ddl1 , v dd 2 , and v ddl2 , as well as at the two internal regulator bypass pins: v ddc1 and v ddc2 (see figure 15 ). pl acement of the r ecommended bypass c apacitors is shown in figure 15 . the capacitor value should be between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power supply pin should not exceed 20 mm . v ddl1 gnd 1 v ia v ib v ic /v oc v id /v od ctrl 1 v dd1 v ddc1 gnd 1 v ddl2 gnd 2 v oa v ob v oc /v ic v od /v id ctrl 2 v dd2 v ddc2 gnd 2 10459-016 figure 15 . recommended printed circuit board (pcb) layout in applications involving high common - mode transients, it is important to minimize board coupling across the isolation barrier. furthermore, desi gn the board layout so that any coupling that does occur equally affects all pins on a given component side . failure to follow this design guideline can allow voltage differentials between pins that exceed the absolute maximum ratings of the device during high voltage transients, which can lead to latch - up or permanent damage. propagation delay related parameters propagation delay is a parameter that describes the time it takes a logic signal to propagate through a component. the input - to - output propagation delay time for a high to low transition may differ from the propagation delay time of a low t o high transition. input (v ix ) output (v ox ) t plh t phl 50% 50% 10459-017 figure 16 . propagation delay parameters pulse width distortion is the maximum difference between these two propagat ion delay values and an indication of how accurately the timing of the input signal is preserved. channel to channel matching refers to the maximum amount of time that the propagation delay differs between channels within a single adum3480 / adum3481 / ADUM3482 component. propagation delay skew refers to the maximum amount of time t hat the propagation delay differs bet ween multiple adum3480 / adum3481 / ADUM3482 components operating under the same conditions. dc correctness and m ag netic field immunity positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent via the transformer to the decoder. the decoder is bistable and is, therefore, either set or reset by the pulses indicating input logi c transitions. in the absence of logic transitions at the input for more than ~ 1 .7 s, the current dc state is sent to the output to ensure dc correctness at the output. if the decoder receives no pulses for more than about 5 s, the input side is assumed to be unpowered or nonfunctional, in which case the isolator output is forced to a default low state by the watchdog timer circuit.
adum3480/adum3481/ADUM3482 data sheet rev. 0 | page 18 of 20 the limitation on the magnetic field immunity of the device is se t by the condition in which induced voltage in the receiv ing coil of the transformer is sufficiently large to either falsely set or reset the decoder. the following analysis defines such conditions. the adum3480 / adum34 81 / ADUM3482 are examined in a 3 v operating condition because it represents the most susceptible mode of operation of th e s e product s. the pulses at the transformer output have an amplitude of greater than 1. 5 v. the decoder has a sensing threshold of approximately = 1.0 v, there by establishing a 0.5 v margin with in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by v = (? d / dt )? r n 2 ; n = 1, 2, , n where: is the magnetic flux density. r n is the radius of the n th turn in the receiving coil. n is the number of turns in the receiving coil. given the geometry of the receiving coil in the adum3480 / adum3481 / ADUM3482 and an imposed requirement that the induced voltage be, at most, 50% of the 0.5 v margin at the decoder, a maximum allowab le magnetic field is calculated as s hown in figure 17. 100 10 1 0.1 0.01 0.001 1k 100m 10k maximum allowable magnetic flux density (kgauss) 100k 1m 10m magnetic field frequency (hz) 10459-018 figure 17 . maximum allowable external magnetic flux density for example, at a magnetic field frequency of 1 mhz, the maximum allowable magnetic field of 0.5 kgauss induces a voltag e o f 0.25 v at the receiving coil. this is about 50% of the sensing threshold and does not cause a faulty output transition. if such an event occurs, with the worst - case polarity, during a transmitted pulse , it reduce s the received pulse from >1.0 v to 0.75 v . this is still well above the 0.5 v sensing threshold of the decoder. the preceding magnetic flux density values correspond to specific current magnitudes at given distances away from the adum3480 / adum3481 / ADUM3482 transformers. figure 18 expresses these allowable current magni tudes as a function of frequency for selected distances. the adum3480 / adum3481 / ADUM3482 are very insensitive to external fields. only extremely large, high frequency curre nts that are very close to the component are a concern. for the 1 mhz example noted, a 1.2 ka current would need to be placed 5 mm away from the adum3480 / adum348 1 / ADUM3482 to affect component operation. 1000 100 10 1 0.1 0.01 1k 100m 10k maximum allowable current (ka) 100k 1m 10m magnetic field frequency (hz) distance = 5mm distance = 1m distance = 100mm 10459-019 figure 18 . maximum allowable current for various current to adum 348 0 spacings note that at combinations of strong magnetic field and high frequency, or any loops formed by pcb traces , can induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry. take care to avoid pcb structures that form loops. power consmption the supply current at a given channel of the adum3480 / adum3481 / ADUM3482 isolator is a function of the supply voltage , the data rate of the channel, and the output load of the channel. calculating i dd1 or i dd2 for each input channel, assuming worst case i/o voltage , the supply current is given by i ddi = i ddi ( q ) r d 2.5 r r i ddi = i ddi (d) ( r d ? r r ) + i ddi ( q ) r d > 2.5 r r for each output channel, the supply current is given by i ddo = i ddo ( d ) r d + i ddo ( q )
data sheet adum3480/adum3481/ADUM3482 r ev. 0 | page 19 of 20 calculating i ddl1 or i ddl2 for each input channel, the supply current is given by i ddil = i ddil (d) r d + i ddil ( q ) for each output channel, the supply current is given by ) ( 3 ) ( 2 10 q ddol d ddol l d ddol ddol i r v c i i + ? ? ? ? ? ? ? ? + = ? where: c l is the output load capacitance (pf). v ddol is the output supply voltage (v). r d is the input logic signal data rate (mbps); it is twice the input frequen cy, expressed in units of mhz. r r is the input stage refresh rate (mbps) = 1/t r (s) i ddi (q) , i ddil (q) , i ddo (q) , i ddol (q) are the specified input and output quiescent supply currents (ma). i ddi (d) , i ddil (d) , i ddo (d) , and i ddol(d) are the input and output dynamic supply currents per channel (ma/mbps). as inputs and outputs can be present on each side of the device, the calculations refer to the current drawn from the local supply . for example , if an output is on s ide 2 of a part, the i ddol current i s drawn from the v ddl2 pin of the part. the i ddl1 and i ddl2 currents are dependent on v ddl1 and v ddl2 , the data rate , and the capacitive load. it is nearly independent of the value of the core supplies. to calculate the total i dd1 , i ddl1 , i dd2 , and i ddl2 s upply current , the supply currents for each input and output channel corresponding to v dd1 , v ddl1 , v dd2 , and v ddl2 are calculated and totaled, or read from figure 8 through figure 14. the input current for the regulated core power supplies is nearly independent of the i/o voltage, and scales with data rate. the i ddi current is not linear down to dc, but goes to a minimum value between about 2.5 r r and dc. this is due to t he refresh circuit establishing a minimum data rate ; the value s in figure 8 and figure 9 and the quiescent current s in table 3 , table 6 , and table 9 approximate the current in this region. v ddi , v ddo , v ddil , and v ddol represent the voltages on the core and i/o power supply pins for the input and output of a given cha nnel. i represents an input, o is an output , and l denotes an i/o supply. inslation lifetime all insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. the rate of insulation degradation depend s on th e characteristics of the voltage waveform applied across the insulation. in addition to the testing performed by the regulatory agencies, analog devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure withi n the adum3480 / adum3481 / ADUM3482 . analog devices performs accelerated life testing using voltage levels that are higher than the rated continuous working voltage . acceleration factors for several operating conditions are determined. these factors allow calculation of the time to failure at the actual working voltage. the values shown in table 16 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition and the maximum csa/vde approved working voltages . in many cases, the approved working voltage is higher than the 50- year service life voltage. operation at these high working voltages can lead to shortened insulation life in some cases. the insulation lifetime of the adum3480 / adum3481 / ADUM3482 depends on the voltage waveform type imposed across the isolation barrier. the icoupler insulation structure degrades at different rates depending on whether the waveform is bipolar ac, unipolar ac, or dc. figure 19, figure 20, and figure 21 illustrate these different isolation voltage waveforms. bipolar ac voltage is the most stringent environment. the goal of a 50 - year operating lifetime under the ac bi polar condition determines the maximum working voltage recommended by analog devices . in the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower. this allows operation at higher working voltages while still achieving a 5 0 - year service life. the working voltages listed in table 16 can be applied while maintaining the 50- year minimum lifetime , provided that the voltage conforms to either the u nipolar ac or dc voltage case. treat a ny cross - insulatio n voltage waveform that does not conform to figure 19, figure 20 , or figure 21 as a bipolar ac waveform, and limit its peak voltage to the 50 - year lifetime voltage value listed i n table 16. note that the voltage presented in figure 20 is shown as sinusoida l for illustration purposes only. it is meant to represent any voltage waveform varying between 0 v and some limiting value. the limiting value can be positive or negative, but the voltage cannot cross 0 v. 0v rated peak voltage 10459-020 figure 19 . bipolar ac waveform 0v rated peak voltage 10459-021 figure 20 . unipolar ac waveform 0v rated peak voltage 10459-023 figure 21 . d c waveform
adum3480/adum3481/ADUM3482 data sheet rev. 0 | page 20 of 20 outline dimensions compliant t o jedec s t andards mo-150-ae 060106- a 20 1 1 10 1 7.50 7.20 6.90 8.20 7.80 7.40 5.60 5.30 5.00 sea ting plane 0.05 min 0.65 bsc 2.00 max 0.38 0.22 coplanarit y 0.10 1.85 1.75 1.65 0.25 0.09 0.95 0.75 0.55 8 4 0 figure 22 . 20- lead standard small outline package [ssop] (rs - 20) dimensions shown in millimeters ordering guide model 1 no. of inputs, v dd1 side no. of inputs, v dd2 side maximum data rate max pr op delay, 5 v temperature range package description package option adum3480arsz 4 0 1 mbps 90 ns ? 40 c to +125 c 20 - lead ssop rs - 20 adum3480arsz - rl7 4 0 1 mbps 90 ns ? 40 c to +125 c 20 - lead ssop, 7 reel rs - 20 adum3480brsz 4 0 25 mbps 33 ns ? 40 c to +125 c 20 - lead ssop rs - 20 adum3480brsz - rl7 4 0 25 mbps 33 ns ? 40 c to +125 c 20 - lead ssop, 7 reel rs - 20 adum3481arsz 3 1 1 mbps 90 ns ? 40 c to +125 c 20 - lead ssop rs - 20 adum3481arsz - rl7 3 1 1 mbps 90 ns ? 40 c to +125 c 20 - lead ssop, 7 reel rs - 20 adu m3481brsz 3 1 25 mbps 33 ns ? 40 c to +125 c 20 - lead ssop rs - 20 adum3481brsz - rl7 3 1 25 mbps 33 ns ? 40 c to +125 c 20 - lead ssop, 7 reel rs - 20 ADUM3482arsz 2 2 1 mbps 90 ns ? 40 c to +125 c 20 - lead ssop rs - 20 ADUM3482arsz - rl7 2 2 1 mbps 90 ns ? 40 c to +1 25 c 20 - lead ssop, 7 reel rs - 20 ADUM3482brsz 2 2 25 mbps 33 ns ? 40 c to +125 c 20 - lead ssop rs - 20 ADUM3482brsz - rl7 2 2 25 mbps 33 ns ? 40 c to +125 c 20 - lead ssop, 7 reel rs - 20 1 z = rohs compliant part. ? 2012 analog devices, in c. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d10459 - 0- 7/12(0)

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